Electronic system-level design and verification

Results: 25



#Item
11Integrated circuits / Hardware verification languages / Synopsys / Hardware description language / Electronic system-level design and verification / Signoff / Logic synthesis / Integrated circuit design / SystemVerilog / Electronic engineering / Electronic design automation / Electronic design

SNPS[removed]10-K

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Source URL: www.synopsys.com

Language: English - Date: 2015-02-24 17:15:56
12Computer buses / Transaction-level modeling / SystemC / Advanced Microcontroller Bus Architecture / System on a chip / Electronic system-level design and verification / CoreConnect / High-level synthesis / Modeling language / Electronic engineering / Electronic design automation / Digital electronics

Extending the Transaction Level Modeling Approach for Fast Communication Architecture Exploration

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Source URL: www.engr.colostate.edu

Language: English - Date: 2004-06-11 02:36:08
13Hardware verification languages / Hillsboro /  Oregon / Synopsys / High-level synthesis / SystemC / System on a chip / Logic synthesis / Ricoh / Electronic engineering / Electronic design automation / Electronic design

Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO

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Source URL: www.synopsys.com

Language: English
14Hardware verification languages / Hillsboro /  Oregon / Synopsys / High-level synthesis / SystemC / System on a chip / Logic synthesis / Ricoh / Electronic engineering / Electronic design automation / Electronic design

Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO

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Source URL: www.synopsys.com

Language: English
15Hardware verification languages / Hillsboro /  Oregon / Synopsys / High-level synthesis / SystemC / System on a chip / Logic synthesis / Ricoh / Electronic engineering / Electronic design automation / Electronic design

Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO

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Source URL: www.synopsys.com

Language: English
16Simulink / Systems Modeling Language / Electronic system-level design and verification / Profile / UML tool / Diagram / MATLAB / Modeling language / EAST-ADL / Software / Unified Modeling Language / Computing

From UML/SysML to Matlab/Simulink: Current State and Future Perspectives Yves Vanderperren, Wim Dehaene EE Dept., ESAT-MICAS, Katholieke Universiteit Leuven, B-3001 Leuven, Belgium 1. Motivation Several recent EDA survey

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Source URL: www.omgsysml.org

Language: English - Date: 2010-02-14 11:26:07
17Integrated circuits / Computer-aided design / Electronic system-level design and verification / Cadence Design Systems / Synopsys / Application-specific integrated circuit / EUREKA / Software design / Electronic engineering / Electronics / Electronic design automation

A508-medea+ (lo1[removed]:50

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Source URL: www.catrene.org

Language: English - Date: 2009-03-25 10:36:43
18Hardware verification languages / Electronic system-level design and verification / SystemC / Transaction-level modeling / Systems Modeling Language / Systems engineering / SIGNAL / Integrated circuit design / E / Electronic engineering / Electronic design automation / Hardware description languages

PROJECT RESULT Design methodologies A508: Specification and algorithm/architecture co-design for highly complex applications in automotive and communication (SpeAC)

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Source URL: www.catrene.org

Language: English - Date: 2009-03-25 10:39:11
19Electronic system-level design and verification / IMEC / Software development methodology / CISC Semiconductor / Model-based design / Electronic engineering / Electronic design automation / SystemC

Project profile CA701 I A unified virtual-prototyping design PROJECT CONTRIBUTES TO Communication Automotive and transport

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Source URL: www.catrene.org

Language: English - Date: 2014-04-24 10:08:22
20Electronic design / Integrated circuits / Mentor Graphics / Cadence Design Systems / Electronic design automation / Integrated circuit design / Design rule checking / Synopsys / Electronic system-level design and verification / Electronic engineering / Design / Electronics

PDF Document

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Source URL: s3.mentor.com.s3.amazonaws.com

Language: English - Date: 2012-05-30 19:18:57
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